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Professor Byoungdeog Choi

Professor, School of Information and Communication Engineering, Sungkyunkwan University (March, 2008 ~ Present)
Senior Device Reliability Engineer for LTPS Polysilicon TFTs, Advanced Technology Institute, Samsung, Kiheung, Korea (Sept. 2002 ~ 2008)
Research Associate under Dr. D.K Schroder in Electrical Engineering (1998-2001) at Arizona State Univ.
Intern at Shin-Etsu Handotai America Co., Ltd.(SEH-America), Vancouver,Washington.(June,1999 to August,1999)
Instructional Aide for the subject of Analog Circuit Design (1998 -1999) at Arizona State Univ.
Graduate Assistant Teacher in the Dept. of Physics ( 1993-1994) at Kyung Hee Univ.
Research Assistant in the Dept. of Physics (1988-1990) at Kyung Hee Univ.
  : Display Device(OLED, Thin Film Device on Flexible/Glass Substrate)
Low Temperature Poly Silicon TFTs
-PECVD Gate Oxide Integrity
-ELA, MILC, HPA, and SPC Crystallization for LTPS Polysilicon TFTs
-Near Sub-micron Polysilicon TFT characterization
-Stability Enhancement of Polysilicon Thin-Film Transistors
-Effect of Channel Doping on Low Temperature Polycrystalline Silicon Thin-film Transistors

Device Reliability of Advanced CMOS Submicron Technologies
-Characterization of MOS Capacitor, and MOSFET with I-V, generation and recombination lifetime, and C-f Dependence
-Generation and Recombination Lifetime Measurement of Epi Wafers and Denuded Wafers
-Gate Oxide Integrity (GOI) Characterization
-Detection of Impurities (Fe, Cu ,Pt, Au, Cr ..etc) by DLTS
-Submicron SOI floating body effects
-Silvaco Simulation for extracting spice model parameter
-Kink effects
-Hot carrier reliability of CMOS Circuits
-Negative Bias Temperature Instabilities (NBTI)
-Boron Penetration in PMOS Devices
* Office Address:
School of Information and Communication Engineering
Rm. 23208, Engineering building #1, Sungkyunkwan University
300 Chunchun-dong, Jangan-gu
Suwon, Kyounggi-do, S. Korea 440-746
Tel: 82-31-299-4589 / Cell: 82-11-9137-6264
e-mail: bdchoi@skku.edu